Two of the frequently used design rules for STA are max transition and max capacitance. These rules check that all ports and pins in the design meet the specified limits for transition time1 and capacitance. These limits can be specified using:
· set_max_transition
· set_max_capacitance
As part of the STA, any violations to these design rules are reported in terms of slack. Here are some examples. set_max_transition 0.6 IOBANK # Sets a limit of 600ps on IOBANK. set_max_capacitance 0.5 [current_design] # Max capacitance is set to 0.5pf on all nets in # current design.
Two of the frequently used design rules for STA are
i) max transition
ii) max capacitance
These rules check that all ports and pins in the design meet the specified limits for transition time
and capacitance. These limits can be specified using:
• set_max_transition
• set_max_capacitance
As part of the STA, any violations to these design rules are reported in terms of slack. Here are some examples.
set_max_transition 0.6 IOBANK
# Sets a limit of 600ps on IOBANK.
set_max_capacitance 0.5 [current_design]
# Max capacitance is set to 0.5pf on all nets in current design.
The capacitance on a net is calculated by taking the sum of all the pin
capacitances plus any IO load plus any interconnect capacitance on the net.
There are other design rule checks that can also be specified for a
design.
These are:
set_max_fanout
(specifies a fanout limit on all pins in design),
set_max_area
(for a design); however these checks apply for synthesis and not for STA.
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