Max frequency of any circuit

Important equations:
       Clock period >= Setup time + Hold time
       Tclk,min > Tcq1+Tcomb+Tsu2
       Thold < Tcq,min + Tcomb,min

For any circuit, to find out max frequency of the circuit:
     Min clock period = max (F2F delay, Clock_to_out_delay, Pin_to_pin delay)

F2F dealy:         Find out all possible F2F delay and choose worst one out of them.
CK_to_OUT:    Find out all possible Clock to Output pin delays and choose worst one out of them.
pin_to_pin:       Find out all possible pin to pin delays and choose worst one out of them (i.e., in_to_out, or other combinational pin to pin delays in the circuit)

Few points on clock frequency:
          Individual FF characteristics Tsu, Th, Tcq are independent of clock frequency and only dependent on device sizes and technology.

Frequency affects path delays (can be critical paths) and setup & hold slacks but not individual cell delays.