perl scripts

1. Split spx file:
#! /cadappl/bin/perl
##### usage :: 
##### Example :: SplitSpectreNetlist.pl CMOS14_SC_24_CORE_GO3.scs
open(FILE,"<$ARGV[0]") or die "Not able to open the file $ARGV[0]";
$simulator="simulator lang = spectre  insensitive = yes";
while ()
      {
        if($_=~m/\s*subckt\s*(\w+)\s*/)
  {
  $filename=$1.".spectre";
  system ("touch $filename");
          open(OUTFILE,">$filename") or die "Not able to open the file $filename";
    print OUTFILE "$simulator\n\n";
    print OUTFILE "$_";
if($_=~m/s*ends\s*(\w+)\s*/) {
print OUTFILE "$_";
exit;
}
   }
else {a
    print OUTFILE "$_";

     }
 }

2.  Correct verilog headers file port order:

#Purpose: Corrects the pin order in headers file.

#!/usr/local/bin/perl

use strict;

print "enter the file name: " ;

my $file = ;

open (PVT, "<$file") or die "Unable to open the headers_file $! ";

my $i =0;

my $j =0;

my $k =0;

my $x =0;

my @out;

my @in;

my @inout;

my @inout_final;

my @in_final;

my @out_final;

my $x;

my $a1;

my $a2;

my $a3;

my $top_line;

my $cellName;

my $var;

open (VDB, ">headers_file_final.txt") or die "Unable to open the headers_file_final.txt file $! ";

while (my $line=) {

      chomp($line);

    if ($line !~ m/endmodule/ ) {

if ($line =~ m/^\s*module/ ) {

$top_line = $line;

($cellName=$top_line)=~ s/\s*module\s+(\w+).*/$1/g;

print STDERR "Processing cell '$cellName' ...\n";

}

if ($line =~ m/output/ ) {

$out[$i] = $line;

$i = $i +1;

} elsif ($line =~m/input/) {

$in[$j] = $line;

$j = $j +1;

} elsif ($line =~m/inout/) {

$inout[$k] = $line;

$k = $k +1;

}

   } else {

##sorting & removing undef variables

@out = grep {defined($_)} sort @out;

@in = grep {defined($_)} sort @in;

@inout = grep {defined($_)} sort @inout;

## getting the port list

$x=0;

foreach (@inout) {

($inout_final[$x]=$inout[$x])=~ s/\s*inout\s+(\w+).*/$1/g;

$x++;

}

$a1 = join(',', @inout_final);

$x=0;

foreach (@out) {

($out_final[$x]=$out[$x])=~ s/\s*output\s+(\w+).*/$1/g;

$x++;

}

$a2 = join(',', @out_final);

$x=0;

foreach (@in) {

($in_final[$x]=$in[$x])=~ s/\s*input\s+(\w+).*/$1/g;

$x++;

}

$a3 = join(',', @in_final);

##printing to the file

print VDB "module $cellName ($a2,$a3,$a1); \n";

foreach (@out) {

print VDB "$_ \n";

}

foreach (@in) {

print VDB "$_ \n";

}

foreach (@inout) {

  print VDB "$_ \n";

      }

      print VDB "$line \n";

      

      ##Intializing the arrays..to get ready for the next 

      ##iteration.

      undef(@out);

      undef(@in );

      undef(@inout);

      undef(@out_final);

      undef(@in_final );

      undef(@inout_final);

}

}#end of while loop

close VDB;

close PVT;

3.  Automate verilog gen:

#Purpose: Generating a verilog testbench from the truth table

#Author : Suresh Kumar Kodam

#!/usr/local/bin/perl

#use strict;

#Open the truth table

my $truth_table;

print "enter the testbench file name: ";

$truth_table = ;

open (TT, "$truth_table") or die "Unable to open the truth table file $! ";

system("rm golden_ref.txt veri_testbench.txt final_veri_tb.txt");

system("touch golden_ref.txt");

system("chmod 777 golden_ref.txt");

system("touch veri_testbench.txt");

system("chmod 777 veri_testbench.txt");

print "********************************************************************************\n";

print "Please enter the number of inputs in the TT: ";

my $no_inputs;

my $no_outputs;

$no_inputs = ;

print "Please enter the number of outputs in the TT: ";

$no_outputs = ;

open (GOLDEN, ">golden_ref.txt") or die "Unable to open pin forces command file $! ";

open (VERI, ">veri_testbench.txt") or die "Unable to open pin forces command file $! ";

####

system("touch final_veri_tb.txt");

system("chmod 777 final_veri_tb.txt");

my $module;

open (FINAL_VERI, ">final_veri_tb.txt") or die "Unable to open pin forces command file $! ";

print "Please enter the verilog module name for this IO cell: ";

$module = ;

chomp($module);

print FINAL_VERI "\`timescale 1ns \/ 10ps \n";

print FINAL_VERI "module stimulus; \n";

###

my $line;

my $input;

my $output;

my $found;

my @arr;

my @input_arr;

my @temp_arr;

my @output_arr;

my @temp_output_arr;

my $variables;

my $temp_arr_size;

$found = 0;

my $i;

my $j;

my @in_arr;

my @out_arr;

our ($a, $b);

print "******************************************************************************\n";

print ("Generating Golden_ref and verilog testbench files\n");

#genrating golden_ref.txt and final verilog testbench file

while ($line=) {

chomp($line);

print ".";

########################################

# getting names of input and output pins

if( $line =~ /\/\//) {

if ($found == 0) {

    $variables = $';

$variables =~ s/^\s+//;  #Remove Leading ^Spaces

        $variables =~ s/\s+$//;  #Remove Trailing Spaces

#Splitting inputs and outputs pins

($a, $b) = split(":", $variables);

@in_arr = split (" ", $a);

@out_arr = split(" ", $b);

#######printing inouts to final tb############

print FINAL_VERI "reg ";

my $k=0;

foreach my $ele (@in_arr) {

print FINAL_VERI " $ele ";

$k++;

if($k < scalar @in_arr) {

print FINAL_VERI ", ";

}

}

print FINAL_VERI " ; \n";

###

print FINAL_VERI "wire ";

my $k=0;

foreach my $ele (@out_arr) {

print FINAL_VERI " $ele ";

$k++;

if($k < scalar @out_arr) {

print FINAL_VERI ", ";

}

}

print FINAL_VERI " ; \n";

##################################################

#####instantiation of the top module and port mapping

print FINAL_VERI "$module inst \( ";

foreach my $ele (@out_arr) {

print FINAL_VERI " \.$ele\($ele\), ";

}

my $k=0;

foreach my $ele (@in_arr) {

print FINAL_VERI " \.$ele\($ele) ";

$k++;

if($k < scalar @in_arr) {

print FINAL_VERI ", ";

}

}

print FINAL_VERI " \); \n";

#############################################

$variables =~ s/://;

@arr = split (" ", $variables);

my $i=0;

#foreach my $ele (@arr) {

# print "arr ele = $arr[$i],$ele, $i ";

# print "\n";

# $i++;

#}

@temp_arr = @arr;

my $temp_arr_size =scalar @temp_arr ;

print "temp arr_size = $temp_arr_size \n";

#########print inout variables:

print "inout variables: ";

while ($temp_arr_size >0) {

my $var = shift (@temp_arr);

print "$var ";

$temp_arr_size--;

}

print "\n"; 

   $found = 1;

########

print FINAL_VERI "initial \n";

print FINAL_VERI "begin \n";

} 

} #closing brace for the main if loop

########################################

next if( $line =~ /\/\//) ; #skip if it is a comment in the truth table

################################################

#Dividing inputs and outputs and dumping into golden_ref and verilog testbench files

if ( $line =~ /:/ ) {

$input = $`;

$output = $';

$input =~ s/^\s+//;

        $input =~ s/\s+$//;

@input_arr = split (" ",$input);

my $input_arr_size =scalar @input_arr ;

$output =~ s/^\s+//;

        $output =~ s/\s+$//;

        $output =~ s/;//;

@output_arr = split (" ",$output);

my $output_arr_size =scalar @output_arr ;

@temp_output_arr =  @output_arr;

###############################Dumping the values to golden_ref, veri_test, final_veri_tb###########

$i = 0;

print FINAL_VERI "\#5 ";

while ($i < $no_inputs) {

print GOLDEN  "$arr[$i] = $input_arr[$i];";

print VERI  "$arr[$i] = 1'b$input_arr[$i];";

print FINAL_VERI  "$arr[$i] = 1'b$input_arr[$i];";

$i= $i+1;

}

$j=0;

while ($i < $no_inputs+$no_outputs) {

print GOLDEN "$arr[$i] = $output_arr[$j];";

print VERI "$arr[$i] = 1'b$output_arr[$j];";

#print FINAL_VERI "$arr[$i] = 1'b$output_arr[$j];";

$i = $i + 1; 

$j = $j + 1; 

}

print GOLDEN "\n";

print VERI "\n";

print FINAL_VERI "\n";

###############################################################

}

}

print FINAL_VERI "end \n";

print FINAL_VERI "initial \n";

print FINAL_VERI "\$monitor \(\$time , \"";

foreach my $ele (@in_arr) {

print FINAL_VERI " $ele = %b, ";

}

###

my $k=0;

foreach my $ele (@out_arr) {

print FINAL_VERI " $ele =%b ";

$k++;

if($k < scalar @out_arr) {

print FINAL_VERI " , ";

}

}

print FINAL_VERI " \" , ";

foreach my $ele (@in_arr) {

print FINAL_VERI "$ele, ";

}

my $k=0;

foreach my $ele (@out_arr) {

print FINAL_VERI " $ele ";

$k++;

if($k < scalar @out_arr) {

print FINAL_VERI " , ";

}

}

print FINAL_VERI "\); \n";

##################################################

print FINAL_VERI "endmodule \n";

print "\n";

print "Golden reference and testbench files are successfully created \n";

print "Please open golden_ref.txt, final_veri_tb.txt for correctness \n";

print "********************************************************************\n";

####################################################

close TT;

close GOLDEN;

close VERI;

close FINAL_VERI;

system("touch final2_veri_tb.v");

system("chmod 777 final2_veri_tb.v");

open (FINAL_VERI, "

open (FINAL2_VERI, ">final2_veri_tb.v") or die "Unable to open pin forces command file $! ";

while ($line=) {

if ($line =~ m/1\'b\?/) {

$line =~ s/1\'b\?/1\'bx/;

}

print FINAL2_VERI "$line";

}

close FINAL_VERI;

close FINAL2_VERI;

5. result.pl

#!/usr/bin/perl

use strict;

open (OUT1, "output.txt") or die "unable to open the file $!";

system("rm result_final.txt");

system("touch result_final.txt ");

open (STDOUT, ">>result_final.txt");

open (STDERR, ">>result_final.txt");

print"=========================================================\n";

print "S.No: \t .pm file \t \t status \t file path \n";

print "========================================================\n";

my $num = 1; 

my ($file_path,$status,$file);

##################################################################

#Printing the Syntax OK files

##################################################################

while(my $line = ) {

if ($line =~m/syntax (OK)/) {

$file_path = $`;

$status = $1;

if($` =~m/(\w+\.\w+)/) {

$file = $1; 

}

print "$num \t $file \t \t $status \t $file_path";

print "\n";

$num++;

}

}

close OUT1;

##################################################################

#Printing the Syntax status FAILED files

##################################################################

print"=========================================================\n";

print "S.No:\t .pm file \t \t status \t file path \n";

print "========================================================\n";

my $num2 = 1; 

open (OUT2, "output.txt") or die "unable to open the file $!";

while(my $line = ) {

if ($line =~m/compilation aborted at/) {

#$line consists ==>BEGIN failed--compilation aborted at ./lib/perl58/sunos/XML/Parser.pm line 18.

if($line =~m/(\s*\.\/(\w*)\/(\w*)\/(\w*)\/(\w*)\/(\S*\.pm))\s*(line (\d+))\s*/) {

print  "$num2 \t $6". "\t \t FAILED" . "\t  $1"."at line:"."$8 \n";

$num2++;

}

}

if ($line =~m/syntax error at/)  {

#$line contains ==> syntax error at ./lib/perl5/qcore/Qualification/FTree.pm line 58

if ($line =~m/\s*(\.\/(\w*)\/(\w*)\/(\w*)\/(\w*)\/(\S*\.pm))\s*(line (\d*))\s*/) {

print "$num2 \t $6"."\t \t FAILED" . "\t $1"."  at line:"."$8 \n";

$num2++;

}

}

}

6. Checking syntax of files:

#!/usr/bin/perl

use strict;

my ($workarea,$tools,$qcore_inc_path,$command,$qcore_dev);

$workarea = "/psc/proj/CoReUse_qual/qnr_temposync/workareas/ksuresh";

$qcore_dev = "$workarea/qnr_flow/qcore/qcore_dev";

$tools = "$workarea/qnr_flow/qcore/qcore_dev/qdf/tools";

$qcore_inc_path = "$qcore_dev/lib/perl5/qcore";

chdir("$tools");

$command = "find . -name \"\*.pl\" -print";

system("touch array_pl.txt1");

system("chmod 777 array_pl.txt1");

system("$command >array_pl.txt1");

system("pwd");

print ("==============STEP-1============ \n");

print (" list of .pl files are in array.txt file \n");

print (" STEP-1 has completed successfully \n");

#print the .pm files

open (LOGFILE, "array_pl.txt1") or die "Unable to open hdlgather log file ";

while () {

        print "$_";

}

close LOGFILE;

my ($command2,$command_final);

#syntax checking of .pl files

system("pwd");

open (LOGFILE, "$tools/array_pl.txt1") or die "Unable to open hdlgather log file ";

$command2 = "perl -I $qcore_inc_path";

print "===============STEP-2==============\n";

print " command = $command2 \n";

print " STEP-2 has completed successfully \n";

print "===================================\n";

system("rm output_pl.txt");

system("touch output_pl.txt");

open (OUTFILE, "output_pl.txt") or die "unable to open the file $!";

print "Executing the command...Please wait.. result wil be available in result_final_pl.txt file\n";

my $num;

$num = 1;

while(my $line = ) {

$command_final = $command2. " -cw ${line} ";

open (STDOUT, ">>output_pl.txt");

open (STDERR, ">>output_pl.txt");

print "*****************$num".".pl"."******************\n ";

#print "-----------------command used ----------------------------------------------\n";

print " Final command = $command_final ";

#print " ---------------------------------------------------------------------------\n";

system("$command_final" );

print "=============================================================================\n";

  $num++; 

 }

system ("chmod 777 output_pl.txt");

close LOGFILE;

close OUTFILE;

#****************************************************************************************************

## Printing the results in output file

#****************************************************************************************************

open (OUT1, "output_pl.txt") or die "unable to open the file $!";

system("rm result_final_pl.txt");

system("touch result_final_pl.txt ");

system("chmod 777 result_final_pl.txt");

open (STDOUT, ">>result_final_pl.txt");

open (STDERR, ">>result_final_pl.txt");

print"=========================================================\n";

printf "%-6s", "S.No:";

printf"%-30s", ".pl file";

printf"%-8s", "status";

printf "%-25s" ,"file path";

print "\n";

print "========================================================\n";

my $num = 1; 

my ($file_path,$status,$file);

##################################################################

#Printing the Syntax OK files

##################################################################

while(my $line = ) {

 $line =~ s/^\s+//; #remove leading spaces

   $line =~ s/\s+$//; #remove trailing spaces

if ($line =~m/syntax (OK)/) {

$file_path = $`;

$status = $1;

if($` =~m/(\w+\.\w+)/) {

$file = $1; 

}

printf "%-6s", "$num";

printf "%-30s", "$file";

printf "%-8s", "$status";

printf "%-25s", "$file_path";

print "\n";

$num++;

}

}

close OUT1;

##################################################################

#Printing the Syntax status FAILED files

##################################################################

print"=========================================================\n";

printf "%-6s", "S.No:";

printf "%-25s", ".pm file";

printf "%-8s", "status";

printf "%-25s" ,"file path";

print "\n";

print "========================================================\n";

my $num2 = 1; 

open (OUT2, "output_pl.txt") or die "unable to open the file $!";

while(my $line = ) {

 $line =~ s/^\s+//; #remove leading spaces

   $line =~ s/\s+$//; #remove trailing spaces

if ($line =~m/compilation aborted at/) {

#$line consists ==>BEGIN failed--compilation aborted at ./lib/perl58/sunos/XML/Parser.pm line 18.

if($line =~m/(\s*\.\/(\w*)\/(\w*)\/(\w*)\/(\w*)\/(\S*\.pm))\s*(line (\d+))\s*/) {

# print  "$num2 \t $6". "\t \t FAILED" . "\t  $1"."at line:"."$8 \n";

        printf "%-6s", "$num2";

printf "%-25s", "$6";

printf "%-8s", "FAILED";

printf "%-25s", "$1 at line $8";

print "\n";

$num2++;

}

}

if ($line =~m/syntax error at/)  {

#$line contains ==> syntax error at ./lib/perl5/qcore/Qualification/FTree.pm line 58

if ($line =~m/\s*(\.\/(\w*)\/(\w*)\/(\w*)\/(\w*)\/(\S*\.pm))\s*(line (\d*))\s*/) {

print "$num2 \t $6"."\t \t FAILED" . "\t $1"."  at line:"."$8 \n";

$num2++;

}

}

}

close OUT2;

7.